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Edithistory:Floorplan (microelectronics)

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1300046896 2025-07-12T00:38:03Z Citation bot Altered doi-broken-date. | [[:en:WP:UCB|Use this bot]]. [[:en:WP:DBUG|Report bugs]]. | #UCB_CommandLine
1295729577 2025-06-15T13:54:03Z Auric clean up ([[User:Novem Linguae/Scripts/DraftCleaner.js|DraftCleaner]])
1295729524 2025-06-15T13:53:35Z Auric /* Floorplanning Design Stage */
1295696970 2025-06-15T08:48:38Z Citation bot Alter: template type, title. Add: chapter-url, isbn, chapter, doi-broken-date, date, eprint, class. Removed or converted URL. Removed access-date with no URL. Removed parameters. Some additions/deletions were parameter name changes. | [[:en:WP:UCB|Use this bot]]. [[:en:WP:DBUG|Report bugs]]. | Suggested by Лисан аль-Гаиб | #UCB_webform 259/396
1295392747 2025-06-13T13:15:02Z CSMention269 Declining submission: exists - Submission is duplicated by another article already in mainspace ([[WP:AFCH|AFCH]])
1295392569 2025-06-13T13:13:36Z CSMention269 CSMention269 moved page [[User:MisterSet/Floorplan (microelectronics)]] to [[Draft:Floorplan (microelectronics)]]: Preferred location for [[WP:AFC|AfC]] submissions
1295383361 2025-06-13T11:42:58Z MisterSet Submitting using [[WP:AFCSW|AfC-submit-wizard]]
1295383248 2025-06-13T11:41:44Z MisterSet Better image placment
1295382886 2025-06-13T11:37:43Z MisterSet Sources for mathematical model part
1295236061 2025-06-12T14:39:02Z Zinnober9 Fixed tracked [[WP:Lint|syntax]] errors (invalid [[WP:EIS]] parameters). Nonnumeric scale value stated for upright.
1295219549 2025-06-12T12:24:21Z MisterSet Adding some sources and links to other wikipedia articles
1294894055 2025-06-10T12:42:22Z MisterSet Detailed description of the floorplan design stage and its different steps
1294893823 2025-06-10T12:40:13Z MisterSet Writing a concise introduction mentioning the design stage floorplanning and that mathematical abstractions have been studied
1294893616 2025-06-10T12:38:19Z MisterSet [[WP:AES|←]]Blanked the page
1294890203 2025-06-10T12:04:06Z MisterSet
1294881018 2025-06-10T10:25:42Z MisterSet
1294880912 2025-06-10T10:24:49Z MisterSet [[WP:AES|←]]Created page with 'In [[electronic design automation]], a '''floorplan''' of an [[integrated circuit]] consists of a schematic arrangement of its major functional blocks on the chip area and the specification of high-level parameters such as the '''aspect ratio''' or '''core utilization'''. The design step in which floorplans are created is called '''floorplanning''', an early stage in the hierarchical approach to [[integrated circuit design]]. Various mathematical abstract...'