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List of Cyrix products

From EverybodyWiki Bios & Wiki


This is a list of all products created by the microprocessor company Cyrix before its end in the early 2000s. This list includes FPUs, CPUs, and SICs.

? - Missing or unknown information.

Floating Point Unit

FasMath 83D87

FasMath 83S87

FasMath 82S87

  • Variants
    • (CX82S87NPSV) ? - ? - ? - 1990
    • (CX82S87PPSV) ? - ? - ? - 1991

Processor

Cx486SLC [1]

  • Introduced May 1992[2]
  • 1 KB L1 cache
  • 'Hybrid' 386 chip incorporating 486 instruction set
  • Data width: 16 bits
  • Address width: 24 bits
  • 600,000 transistors
  • BQFP
  • Variants
    • (Cx486SLC-20) 20 MHz, 20 MHz bus - 5 V core - ?
    • (Cx486SLC-E/V20) 20 MHz, 20 MHz bus - 3.3 V core - ?
    • (Cx486SLC-25MP) 25 MHz, 25 MHz bus, 5 V core - ?
    • (Cx486SLC-E/25MP) 25 MHz, 25 MHz bus - 5 V core - ?
    • (Cx486SLC-E/V25) 25 MHz, 25 MHz bus - 3.3 V core - ?
    • (Cx486SLC-33MP) 33 MHz, 33 MHz bus - 5 V core - ?
    • (Cx486SLC-E/33MP) 33 MHz, 33 MHz bus - 3.3 V core - ?
    • (Cx486SLC-E/40MP) 40 MHz, 40 MHz bus - 5 V core - ?

Cx486SLC2

  • 50 MHz version of the cx486SLC[3]
  • (Cx486SLC2-50) 50 MHz, 25 MHz bus - 5 V core - ?

Cx486SRx2

  • Clip on upgrade chip of the Cx486SLC2 which would go on top of an existing i386SX chip.[4]
  • Variants
    • (Cx486SRx2) 50 MHz, 25 MHz bus - 5 V core - ?

Family Table

Images Model Name Core Name Process Size Die Area Number of Transistors Socket(s) Package(s) Core Voltage TDP (W) Clock Speed Bus Speed L1 Cache Launch Price (USD) Launch Date
Cx486SLC-20 N/A ? μm ? mm2 600,000 N/A BQFP 5 ? 20 MHz 20 MHz 1 KB ? May 1992
Cx486SLC-V20 N/A ? ? 600,000 N/A BQFP 3.3 ? 20 MHz 20 MHz 1 KB ? May 1992
Cx486SLC-25MP N/A ? ? 600,000 N/A BQFP 5 ? 25 MHz 25 MHz 1 KB ? ?
Cx486SLC-E/25MP N/A ? ? 600,000 N/A BQFP 5 ? 25 MHz 25 MHz 1 KB ? ?
Cx486SLC-E/V25 N/A ? ? 600,000 N/A BQFP 3.3 ? 25 MHz 25 MHz 1 KB ? ?
Cx486SLC-33MP N/A ? ? 600,000 N/A BQFP 5 ? 33 MHz 33 MHz 1 KB ? ?
Cx486SLC-E/33MP N/A ? ? 600,000 N/A BQFP 3.3 ? 33 MHz 33 MHz 1 KB ? ?
Cx486SLC-E/40MP N/A ? ? 600,000 N/A BQFP 5 ? 40 MHz 40 MHz 1 KB ? ?
Cx486SLC2-50 N/A ? ? ? N/A BQFP 5 ? 50 MHz 25 MHz 1 KB ? ?
Cx486SRx2 N/A ? ? ? N/A BQFP 5 ? 50 MHz 25 MHz 1 KB ? ?

Cx486DLC[5]

  • Desktop version of the Cx486SLC series
  • 1 KB L1 cache
  • Data width: 32 bits
  • Address width: 32 bits
  • 600,000 transistors
  • CPGA-132
  • Variants
    • (Cx486DLC-33GP) 33 MHz, 33 MHz bus - 5 V core - June 1992
    • (Cx486DLC-40GP) 40 MHz, 40 MHz bus - 5 V core - June 1992

Cx486DRu2[6]

  • Clip on upgrade of the Cx486DLC which would go onto an existing i386DX chip.
  • 1 KB L1 cache
  • Variants
    • (Cx486DRx2-50) 50 MHz, 25 MHz - 5 V core - September 1993
    • (Cx486DRx2-66) 66 MHz, 33 MHz - 5 V core - ?

Family Table

Images Model Name Core Name Process Size Die Area Number of Transistors Socket(s) Package(s) Core Voltage TDP (W) Clock Speed Bus Speed L1 Cache Launch Price (USD) Launch Date
Cx486DLC-33GP N/A ? μm ? mm2 600,000 N/A BQFP 5 ? 33 MHz 33 MHz 1 KB ? June 1992
Cx486DLC-40GP N/A ? ? 600,000 N/A BQFP 5 ? 40 MHz 40 MHz 1 KB ? June 1992
Cx486DRx2-50 N/A ? ? 600,000 N/A BQFP 5 ? 50 MHz 25 MHz 1 KB ? ?
Cx486DRx2-66 N/A ? ? 600,000 N/A BQFP 5 ? 66 MHz 33 MHz 1 KB ? ?

Cx486

M5 (Cx486S)

  • Introduced May 1993
  • Precursor to 5x86, 6x86
  • 2 KB L1 cache
  • 5 V core
  • Socket 3
  • Variants
    • (Cx486S-25GP) 25 MHz, 25 MHz bus - May 1993
    • (Cx486S-33GP) 30 MHz, 30 MHz bus - Cooler attached - ?
    • (Cx486S-40GP) 40 MHz, 40 MHz bus - Cooler attached - ?

M6 (Cx486DX)[7]

  • 8 KB L1 cache
  • Socket 3
  • CPGA Package
    • Variants
      • (Cx486DX-33GP) 33 MHz, 33 MHz bus - No cooler - 5 V core - ?
      • (Cx486DX-40GP) 40 MHz, 40 MHz bus - Optional cooler - 5 V core - ?
      • (Cx486DX-50GP) 50 MHz, 50 MHz bus - Optional cooler - 5 V core - ?
  • QFP Package
    • Variants
      • (Cx486DX-33QP) 33 MHz, 33 MHz bus - No cooler - 3.3 V core - ?

Cx486DX2[7]

  • 8 KB L1 cache
  • Socket 3
  • CPGA Package
    • Variants
      • (Cx486DX2-50GP) 50 MHz, 25 MHz bus - 5 V core - Optional cooler - September 1993
      • (Cx486DX2-66GP) 66 MHz, 33 MHz bus - 5 V core - Optional cooler - ?
      • (Cx486DX2-V66GP) 66 MHz, 33 MHz bus - 3.3/3.45 V core - Optional cooler - ?
      • (Cx486DX2-80GP) 80 MHz, 40 MHz bus - 5 V core - Optional cooler - ?
      • (Cx486DX2-V80GP) 80 MHz, 40 MHz bus - 3.3/3.45 V core - Optional cooler - ?
  • QFP Package
    • Variants
      • (Cx486DX2-V66QFP) 66 MHz, 33 MHz bus - 3.3 V core - Optional cooler - ?

Cx486DX4

  • 8 KB L1 cache
  • Socket 3
  • Variants
    • (Cx486DX4-100GP4) 100 MHz, ? MHz bus - 3.45 V core - ? - September 1995

Family Table

Images Model Name Core Name Process Size Die Area Number of Transistors Socket(s) Package(s) Core Voltage TDP (W) Clock Speed Bus Speed L1 Cache Launch Price (USD) Launch Date
Cx486S-25GP M5 ? μm ? mm2 ? Socket 3 CPGA 5 ? 25 MHz 25 MHz 8 KB ? May 1993
Cx486S-30GP M5 ? ? ? Socket 3 CPGA 5 ? 30 MHz 30 MHz 8 KB ? ?
Cx486S-40GP M5 ? ? ? Socket 3 CPGA 5 ? 40 MHz 40 MHz 8 KB ? ?
Cx486DX-33GP M6 ? ? ? Socket 3 CPGA 5 ? 33 MHz 33 MHz 8 KB ? ?
Cx486DX-40GP M6 ? ? ? Socket 3 QFP 5 ? 40 MHz 40 MHz 8 KB ? ?
Cx486DX-50GP M6 ? ? ? Socket 3 CPGA 5 ? 50 MHz 50 MHz 8 KB ? ?
Cx486DX-33QFP M6 ? ? ? Socket 3 CPGA 3.3 ? 33 MHz 33 MHz 8 KB ? ?
Cx486DX2-50GP ? ? ? ? Socket 3 CPGA 5 ? 50 MHz 25 MHz 8 KB ? Sep 1993
Cx486DX2-66GP ? ? ? ? Socket 3 CPGA 5 ? 66 MHz 33 MHz 8 KB ? ?
Cx486DX2-V66GP ? ? ? ? Socket 3 CPGA 3.3/3.45 ? 66 MHz 33 MHz 8 KB ? ?
Cx486DX2-80GP ? ? ? ? Socket 3 CPGA 5 ? 80 MHz 40 MHz 8 KB ? ?
Cx486DX2-V80GP ? ? ? ? Socket 3 CPGA 3.3/3.45 ? 80 MHz 40 MHz 8 KB ? ?
Cx486DX4-100GP4 ? ? ? ? Socket 3 CPGA 3.45 ? 100 MHz ? 8 KB ? Sep 1995

5x86[8]

M1sc

  • Introduced June 1995
  • Precursor to 6x86
  • 16 KB L1 cache
  • Socket 3
  • 0,65 μm process technology
  • 2 Million transistors
  • 144 mm2 Die size
  • CPGA Package
    • Variants
      • (80GP) 80 MHz, ? MHz bus - ? - ?
      • (100GP) 100 MHz, 33 MHz bus - 3.45 V core - Cooler attached - ?
      • (100GP) 100 MHz, 33 MHz bus - 3.45 V core - ?
      • (100GP) 100 MHz, 33 MHz bus - 3.6 V core - August 1995
      • (120GP) 120 MHz, 40 MHz bus - 3.45 V core - August 1995
  • QFP Package
    • Variants
      • (100QP) 100 MHz, 33 MHz bus - 3.45 V core - QFP - August 1995

Family Table

Images Model Core name Process size Die area Number of Transistors Socket(s) Package(s) Core Voltage TDP (W) Clock speed Bus Speed L1 Cache Price (USD) Launch
80GP M1sc 0,65 μm 144 mm2 2.0 Million Socket 3 CPGA ? ? 80 MHz ? 16 KB ? ?
100GP M1sc 0,65 μm 144 mm2 2.0 Million Socket 3 CPGA 3.45 ? 100 MHz 33 MHz 16 KB ? ?
100GP M1sc 0,65 μm 144 mm2 2.0 Million Socket 3 CPGA 3.45 ? 100 MHz 33 MHz 16 KB ? ?
100GP M1sc 0,65 μm 144 mm2 2.0 Million Socket 3 CPGA 3.6 19.1 100 MHz 33 MHz 16 KB ? August 1995
100QP M1sc 0,65 μm 144 mm2 2.0 Million Socket 3 QFP 3.45 100 MHz 33 MHz 16 KB ? August 1995
120GP M1sc 0,65 μm 144 mm2 2.0 Million Socket 3 CPGA 3.45 4.83 120 MHz 40 MHz 16 KB ? August 1995

6x86 [9]

M1

  • Introduced Q4 1997
  • 16 KB L1 cache
  • 0,65 μm process technology
  • 3 Million transistors
  • 3.3 V core
  • 394 mm2 Die area
  • CPGA-296 (Socket 5, Socket 7, Super Socket 7)
  • Variants
    • (PR90+) 80 MHz, 40 MHz bus
      • Introduced November 1995
    • (PR120+) 100 MHz, 50 MHz bus
      • Introduced October 1995

M1R

  • Introduced Q1 1996
  • Switch from SGS-Thomson 3M manufacturing process to IBM 5M process.
  • 16 KB L1 cache
  • 3 Million transistors
  • 225 mm2 Die area
  • CPGA-296 (Socket 5, Socket 7, Super Socket 7)
  • 0,65 μm process technology
    • 225 mm2 Die area
    • Variants
      • (PR133+) 110 MHz, 50 MHz bus - February 5, 1996 - 3.3 V core
      • (PR150+) 120 MHz, 60 MHz bus - February 5, 1996 - 3.3/3.52 V core
      • (PR166+) 133 MHz, 66 MHz bus - February 5, 1996 - 3.3/3.52 V core
  • 0,44 μm process technology
    • ? Die area
    • Variants
      • (PR200+) 150 MHz, 75 MHz bus - June 6, 1996 - 3.52 V core

M1L

  • 16 KB L1 cache
  • Low voltage version of 6x86
  • 0,35 μm process technology
  • 3 Million transistors
  • 169 mm2 Die area
  • CPGA-296 (Socket 5, Socket 7, Super Socket 7)
  • 2.8/3.3 V core
  • Variants
    • (L-PR120+) 100 MHz, 50 MHz bus - January 1997
    • (L-PR133+) 110 MHz, 50 MHz bus - February 1997
    • (L-PR150+) 120 MHz, 60 MHz bus - March 1997
    • (L-PR166+) 133 MHz, 66 MHz bus - April 1997
    • (L-PR200+) 150 MHz, 75 MHz bus - April 1997

MMX[10]

  • Introduced Q2 1997
  • 64 KB L1 cache
  • 6 Million transistors
  • CPGA-296 (Socket 5, Socket 7, Super Socket 7)
  • 2.9/3.3 V core
  • 0,35 μm process technology - IBM produced
    • 197 mm2 Die area
    • Variants
      • (PR166) 133 MHz, 66 MHz bus - May 30, 1997
      • (PR200) 150 MHz, 75 MHz bus - May 30, 1997
      • (PR233) 188 Mhz, 75 MHz bus - May 30, 1997
      • (PR266) 208 MHz, 83 MHz bus - March 19, 1997
  • 0,30 μm process technology - National Semiconductor produced
    • 156 mm2 Die area
    • Variants
      • (PR166) 150 MHz, 60 MHz bus - Q2 1998
      • (PR200) 166 MHz, 66 MHz bus - Q2 1998
      • (PR233) 188 MHz, 75 MHz bus - Q2 1998
      • (PR266) 208 MHz, 83 MHz bus - Q2 1998

MII[11]

  • Introduced Q2 1998
  • 6x86 MMX rebrand
  • 64 KB L1 cache
  • 6 Million transistors
  • CPGA-296 (Socket 5, Socket 7, Super Socket 7)
  • 0,30 μm process technology
    • 156 mm2 Die area
    • 2.9/3.3 V core
    • Variants
      • (MII-300) 233 MHz, 66 MHz bus - April 14, 1998 - 0,30 μm process technology - 156 mm2 Die area - 2.9/3.3 V core
      • (MII-333) 250 MHz, 100 MHz bus - June 15, 1998 - 0,30 μm process technology - 156 mm2 Die area - 2.9/3.3 V core
  • 0,25 μm process technology
    • 88 mm2 Die area
    • 2.9/3.3 V core
    • Variants
      • (MII-300) 225 MHz, 75 MHz bus - Q1 1999 - 0,25 μm process technology - 88 mm2 Die area - 2.9/3.3 V core
      • (MII-333) 250 MHz, 83 MHz bus - Q1 1999 - 0,25 μm process technology - 88 mm2 Die area - 2.9/3.3 V core
      • (MII-350) 270 MHz, 90 MHz bus - 0,25 μm process technology - 88 mm2 Die area - 2.9/3.3 V core
      • (MII-350) 250 MHz, 83 MHz bus - 0,25 μm process technology - 88 mm2 Die area - 2.9/3.3 V core
      • (MII-366) 250 MHz, 100 MHz bus - Q1 1999 - 0,25 μm process technology - 88 mm2 Die area - 2.9/3.3 V core
      • (MII-300) Mobile - ? MHz, ? MHz bus - ? - 0,25 μm process technology - 88 mm2 Die area - 2.2 V core
      • (MII-333) Mobile - ? MHz, ? MHz bus - ? - 0,25 μm process technology - 88 mm2 Die area - 2.2 V core
  • 0,18 μm process technology
    • 65 mm2 Die area
    • 2.9/3.3 V core
    • Variants
      • (MII-400) 285 MHz, 95 MHz bus - Q2 1999 - 0,18 μm process technology - 65 mm2 Die area - 2.9/3.3 V core
      • (MII-433) 300 MHz, 100 MHz bus - Q2 1999 - 0,18 μm process technology - 65 mm2 Die area - 2.9/3.3 V core
      • MII-400 (Mobile) - ? MHz, ? MHz bus - ? - 0,18 μm process technology - 65 mm2 Die area - 2.2 V core
      • MII-433 (Mobile) - ? MHz, ? MHz bus - ? - 0,18 μm process technology - 65 mm2 Die area - 2.2 V core

Family Table

Images Model Name Core Name Process Size Die Area Number of Transistors Socket(s) Package(s) Core Voltage TDP (W) Clock Speed Bus Speed L1 Cache Launch Price (USD) Launch Date
PR90+ M1 0,65 μm 394 mm2 3.0 Million Socket 7 CPGA 3.3 15.5 80 MHz 40 MHz 16 KB $84 Nov 1995
PR120+ M1 0,65 μm 394 mm2 3.0 Million Socket 7 CPGA 3.3 ? 100 MHz 50 MHz 16 KB $450 Oct 1995
PR133+ M1R 0,65 μm 225 mm2 3.0 Million Socket 7 CPGA 3.3 19.1 110 MHz 55 MHz 16 KB $326 2-5-1996
PR150+ M1R 0,65 μm 225 mm2 3.0 Million Socket 7 CPGA 3.3/3.52 20.1 120 MHz 60 MHz 16 KB $451 2-5-1996
PR166+ M1R 0,65 μm 225 mm2 3.0 Million Socket 7 CPGA 3.3/3.52 21.8 133 MHz 66 MHz 16 KB $621 2-5-1996
PR200+ M1R 0,44 μm ? 3.0 Million Socket 7 CPGA 3.52 17.13 150 MHz 75 MHz 16 KB $499 6-6-1996
L-PR120+ M1L 0,35 μm 169 mm2 3.0 Million Socket 7 CPGA 2.8/3.3 ? 100 MHz 50 MHz 16 KB ? Jan-1997
L-PR133+ M1L 0,35 μm 169 mm2 3.0 Million Socket 7 CPGA 2.8/3.3 ? 110 MHz 55 MHz 16 KB ? Feb-1997
L-PR150+ M1L 0,35 μm 169 mm2 3.0 Million Socket 7 CPGA 2.8/3.3 ? 120 MHz 60 MHz 16 KB ? Mar-1997
L-PR166+ M1L 0,35 μm 169 mm2 3.0 Million Socket 7 CPGA 2.8/3.3 15.98 133 MHz 66 MHz 16 KB ? Apr-1997
L-PR200+ M1L 0,35 μm 169 mm2 3.0 Million Socket 7 CPGA 2.8/3.3 17.13 150 MHz 75 MHz 16 KB ? Apr-1997
PR166-MMX MII 0,35 μm 197 mm2 6.0 Million Socket 7 CPGA 2.9/3.3 ?

?

133 MHz

150 MHz

66 MHz

60 MHz

64 KB $190

?

5-30-97

Q2 1998

PR200-MMX MII 0,35 μm (IBM)

0,30 μm (NS)

197 mm2

156 mm2

6.0 Million Socket 7 CPGA 2.9/3.3 ?

?

150 MHz

166 MHz

75 MHz

66 MHz

64 KB $240

?

5-30-97

Q2 1998

PR233-MMX MII 0,35 μm (IBM)

0,30 μm (NS)

197 mm2

156 mm2

6.0 Million Socket 7 CPGA 2.9/3.3 ?

?

188 MHz

200 MHz

75 MHz

66 MHz

64 KB $320

?

5-30-97

Q2 1998

PR266-MMX MII 0,35 μm (IBM)

0,30 μm(NS)

197 mm2

156 mm2

6.0 Million Socket 7 CPGA 2.9/3.3 ? 208 MHz 83 MHz 64 KB $180

?

3-19-98

Q2 1998

MII-300-MMX (*m) MII 0,30 μm

0,25 μm

156 mm2

88 mm2

6.0 Million Super 7 CPGA 2.9/3.3

2.2 (*m)

?

?

233 MHz

225 MHz

66 MHz

75 MHz

64 KB $180

?

4-14-98

Q1 1999

MII-333-MMX (*m) MII 0,30 μm

0,25 μm

156 mm2

88 mm2

6.0 Million Super 7 CPGA 2.9/3.3

2.2 (*m)

?

?

250 MHz 100 MHz

83 MHz

64 KB $180

?

6-15-98

Mar-1999

MII-350-MMX MII 0,25 μm 88 mm2 6.0 Million Super 7 CPGA 2.9/3.3 ? 270 MHz

250 MHz

90 MHz

83 MHz

64 KB ?

?

?

?

MII-366-MMX MII 0,25 μm 88 mm2 6.0 Million Super 7 CPGA 2.9/3.3 ? 250 MHz 100 MHz 64 KB ? Mar-1999
MII-400-MMX (*m) MII 0,18 μm 65 mm2 6.0 Million Super 7 CPGA 2.2/3.3 ? 285 MHz 95 MHz 64 KB ? Jun-1999
MII-433-MMX (*m) MII 0,18 μm 65 mm2 6.0 Million Super 7 CPGA 2.2/3.3 ? 300 MHz 100 MHz 64 KB ? Jun-1999

Cyrix III [12]

  • Launched February 22, 2000
  • Originally based on the Cyrix Joshua/Gobi core, as successor to MII
  • Only two models released before VIA switched to Samuel core created by Centaur Technology. Even with this, VIA used Cyrix branding until renaming the line "C3."
  • 128 KB L1 cache
  • 256 KB L2 cache
  • 0,18 μm process technology
  • 22 million transistors

Socket 370

Family Table

Images Model Name Core Name Process Size Die Area Number of Transistors Socket(s) Package(s) Core Voltage TDP (W) Clock Speed Bus Speed L1 Cache L2 Cache Launch Price (USD) Launch Date
PR500 Joshua (Gobi) 0,18 μm ? 22 million 370 CPGA 2.2 22 400 MHz 133 MHz 128 KB 256 KB $84 2-2-2000
PR533 Joshua (Gobi) 0,18 μm ? 22 million 370 CPGA 2.2 23.9 433 MHz 66 MHz 128 KB 256 KB $99 2-2-2000
III-466MHz Samuel 0,18 μm 75 mm2 11.3 million 370 CPGA 1.80 ? 466 MHz 133 MHz 128 KB None ? Q2 2000
III-500MHz Samuel 0,18 μm 75 mm2 11.3 million 370 CPGA 1.80 ? 500 MHz 133 MHz 128 KB None ? Q2 2000
III-533MHz Samuel 0,18 μm 75 mm2 11.3 million 370 CPGA 1.80 12 533 MHz 133 MHz 128 KB None ? 6-6-2000
III-550MHz Samuel 0,18 μm 75 mm2 11.3 million 370 CPGA 1.80 14 550 MHz 100 MHz 128 KB None ? 6-6-2000
III-600MHz Samuel 0,18 μm 75 mm2 11.3 million 370 CPGA 1.90 15 600 MHz 100 MHz 128 KB None ? 6-6-2000
III-650MHz Samuel 0,18 μm 75 mm2 11.3 million 370 CPGA 1.80 16 650 MHz 133 MHz 128 KB None ? 6-6-2000
III-667MHz Samuel 0,18 μm 75 mm2 11.3 million 370 CPGA 1.80 16 667 MHz 133 MHz 128 KB None $160 6-6-2000
III-700MHz Samuel 0,18 μm 75 mm2 11.3 million 370 CPGA 1.80 17 700 MHz 100 MHz 128 KB None $62 1-19-2001

System on Chip

MediaGX

  • Introduced February 20, 1997
  • 16 KB L1 cache
  • 0,35 μm process technology
  • 2.4 million transistors
  • Integrated PCI controller, audio, graphics, etc.
  • Variants
    • CPGA-320
    • BGA-352
      • (GX-120BP) 120 MHz, 30 MHz bus - Q1 1997 - 3.3/3.6V
      • (GX-133BP) 133 MHz, 33 MHz bus - Q1 1997 - 3.3/3.6V
      • (GX-150BP) 150 MHz, 30 MHz bus - Q2 1997 - 2.9/3.6V

MediaGXi

  • Low power version of MediaGX
  • Variants
    • CPGA-320
      • ?
    • BGA-352
      • (GXi-166BP) 166 MHz, 33 MHz bus - ? - ?
      • (GXi-180BP) 180 MHz, 30 MHz bus - ? - ?
      • (GXi-200BP) 200 MHz, 33 MHz bus - ? - ?

MediaGXm[13]

  • MMX instructions
  • Variants
    • CPGA-320
      • (GXm-180GP) 180 MHz, 30 MHz bus - ? - 2.9V
      • (GXm-200GP) 200 MHz, 33 MHz bus - ? - 2.2V
      • (GXm-233GP) 233 MHz, 33 MHz bus - ? - 2.9V
      • (GXm-266GP) 266 MHz, 33 MHz bus - ? - 2.9V
      • (GXm-300GP) 300 MHz, 33 MHz bus - ? - 2.9V
    • BGA-352
      • (GXm-180BP) 180 MHz, 30 MHz bus - ? - 2.9V
      • (GXm-200BP) 200 MHz, 33 MHz bus - ? - 2.2V
      • (GXm-233BP) 233 MHz, 33 MHz bus - ? - 2.9V
      • (GXm-266BP) 266 MHz, 33 MHz bus - ? - 2.9V
      • (GXm-300BP) 300 MHz, 33 MHz bus - ? - 2.9V

Family Table

Images Model Name Core Name Process Size Die Area Number of Transistors Socket(s) Package(s) Core Voltage TDP (W) Clock Speed Bus Speed L1 Cache Launch Price (USD) Launch Date
GX-120BP N/A 0.35 μm ? 2.4 million N/A BGA-352 3.3/3.6 ? 120 MHz 30 MHz 16 KB $79 Q1 1997
GX-133BP N/A ? ? 2.4 million N/A BGA-352 3.3/3.6 ? 133 MHz 33 MHz 16 KB $99 Q1 1997
GX-150BP N/A ? ? 2.4 million N/A BGA-352 2.9/3.6 ? 150 MHz 30 MHz 16 KB $99 Q2 1997
GXi-166BP N/A ? ? 2.4 million N/A BGA-352 ? ? 166 MHz 33 MHz 16 KB ? ?
GXi-180BP N/A ? ? 2.4 million N/A BGA-352 ? ? 180 MHz 30 MHz 16 KB ? ?
GXi-200BP N/A ? ? 2.4 million N/A BGA-352 ? ? 200 MHz 33 MHz 16 KB ? ?
GXm-180GP N/A ? ? ? N/A BGA-352

CPGA-320

2.9V ? 180 MHz 30 MHz 16 KB ? ?
GXm-200GP N/A ? ? ? N/A BGA-352 CPGA-320 2.2V ? 200 MHz 33 MHz 16 KB ? ?
GXm-233GP N/A ? ? ? N/A BGA-352 CPGA-320 2.9V ? 233 MHz 33 MHz 16 KB ? ?
GXm-266GP N/A ? ? ? N/A BGA-352 CPGA-320 2.9V ? 266 MHz 33 MHz 16 KB ? ?
GXm-300GP N/A ? ? ? N/A BGA-352 CPGA-320 2.9V ? 300 MHz 33 MHz 16 KB ? ?

See Also

References

  1. ↑ CYRIX Cx486SLC MICROPROCESSOR Data Sheet (PDF). Cyrix. 1992. Search this book on
  2. ↑ "Cyrix-Intel market fight heats up with new chip". The Desert Sun. 31 March 1992. Retrieved 20 February 2022.
  3. ↑ Polilli, Steve (15 November 1993). "Cyrix readies clock-doubled processor". InfoWorld. 15, No. 46. InfoWorld Media Group, Inc. p. 38. ISSN 0199-6649. Retrieved 2 February 2022.
  4. ↑ "Is the Cyrix 386-to-486 Upgrade Chip really that good? Just ask anybody". InfoWorld. InfoWorld Media Group, Inc. 25 April 1994. p. 79. ISSN 0199-6649. Retrieved 3 February 2022.
  5. ↑ CYRIX Cx486DLC MICROPROCESSOR Data Sheet (PDF). Cyrix. 1992. Search this book on
  6. ↑ Cx486DRu2 Microprocessor Upgrade. Cyrix. 1992. Search this book on
  7. ↑ 7.0 7.1 Cx486DX/DX2 3 and 5 VOLT CPUs. Cyrix. Search this book on
  8. ↑ "Cyrix 5x86 Processor Brief". Cyrix. 1995. Archived from the original on 4 January 2003. Retrieved 26 July 2022.CS1 maint: Unfit url (link)
  9. ↑ 6x86 Processor (PDF). Cyrix. 1995. Search this book on
  10. ↑ CYRIX 6x86MX™ PROCESSOR technical brief (PDF). Cyrix. 1997. Search this book on
  11. ↑ Cyrix® M II™ Processor Technical Brief (PDF). Cyrix. 1998. Search this book on
  12. ↑ Cyrix III Processor DataBook (PDF). VIA Technologies. Search this book on
  13. ↑ Cyrix MediaGX MMX Enhanced Data Book Cyrix Corporation Confidential (PDF). Cyrix. 1998. Search this book on



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