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List of instruction sets

From EverybodyWiki Bios & Wiki

A list of computer central processor instruction sets:
(By alphabetical order by its manufacturer.)

Advanced Digital Chips Inc.[edit]

  • EISC:[1] (AE32K) 32-bit embedded core

Altera (later, Intel)[edit]

  • Nios II:[2] 32-bit RISC, CPU core optimized for implementation in Altera FPGAs

AMD[edit]

Analog Devices, Inc. (ADI)[edit]

Apollo Computer Inc.[edit]

ARC International (later, Synopsys)[edit]

  • ARC:[13] Pre-configurable core
  • ARCompact
  • ARCtangent

Arm[edit]

AT&T (later, Lucent then Agere then LSI, then Avago and Intel)[edit]

For StarCore DSP architecture, refer to Motorola section.

Atmel (later Microchip Technology)[edit]

Axis Communications[edit]

Burroughs (later, Unisys)[edit]

Cambridge Consultants / Cambridge Silicon Radio (later, CSR plc)[edit]

CDC (Control Data Corporation)[edit]

Commonwealth Scientific and Industrial Research Organisation[edit]

Cray Research, Inc. (later, Silicon Graphics, Inc., then Cray Inc.)[edit]

C-SKY Microsystems[edit]

Cypress[edit]

  • M8C Core: 8-bit MCU PSoC 1

Data General[edit]

DEC (Digital Equipment Corporation)[edit]

Donald Knuth[edit]

Introduced in the textbook of Prof. Donald Knuth

DSP Group (later, CEVA, Inc.)[edit]

DSP Group and Parthus Technologies plc were merged into CEVA, Inc. in 2002.

  • Oak DSP Core
  • Teak Series
    • Teak DSP Core
    • TeakLite DSP Core
    • CEVA-TeakLite-4
  • CEVA-X
  • CEVA-XC
  • CEVA-XC4000
  • CEVA-XM4

Eckert–Mauchly Computer Corporation (later, Remington Rand then Sperry then Unisys)[edit]

  • UNIVAC 1: The first commercial computer produced in the United States

Elliott Brothers[edit]

EnSilica[edit]

Fairchild[edit]

Fujitsu (later, Cypress)[edit]

  • FR Series: 32-bit RISC MCU
    • FR30/FR60 Family ()[33]
    • FR80/FR81 Family ():[34] Some instructions are removed and added against FR30 and FR60.
  • FR-V: VLIW and vector processor based RISC
  • F2MC Series
    • F2MC-16 Family ():[35] 16-bit MCU
    • F2MC-8L/F2MC-8FX Family ():[36] 8-bit MCU

General Electric (later, Honeywell, then Honeywell/Bull, and then NEC Corporation)[edit]

  • GE-200 series:[37] Small main frame, 20-bit word machine
  • GE-400 series:[38] Middle mainframe, 24-bit word machine
  • GE-412:[39] 20-bit word machine
  • GE-600 series/Honeywell 6000 series: Large main frame, 36-bit CISC, word machine, LSB on left
    • GE-625/635[40]
    • GE-645:[41] Multics available
    • Toshiba TOSBAC-5600: GECOS-3 and ACOS-6 available
    • HIS (Honeywell Information Systems) 6025, 6030, 6040, 6050, 6060, 6070, 6080: GCOS available
    • HIS 6180: Multics available
    • HIS Series 60 Level 66 and Level 66/DPS: GCOS available
    • HIS Series 60 Level 68 and Level 68/DPS: Multics available[42]
    • HIS DPS-8: GCOS available
    • HIS DPS-8M: Multics available[42]
    • Honeywell Bull DPS-88: GCOS available
    • Honeywell Bull DPS-8000:[43] GCOS available
    • NEC ACOS Series 77 System 600, 700, 600S, 800, 900:[44] Succeeded Toshiba's business. GCOS-3 and ACOS-6 available
    • NEC ACOS System 1000 (HIS DPS90), 2000 (HIS DPS/9000), 3900 (HIS DPS/9000-900):[45] ACOS-6 and GCOS-8 available, No Multics

General Instrument Microelectronics (later, Microchip Technology Incorporated)[edit]

The company was established as a subsidiary of General Instrument in 1987, then became an independent company as Microchip Technology in 1989.

Hennessy (,Prof.) and Patterson (,Prof.)[edit]

Hewlett-Packard[edit]

Hitachi (later, Renesas)[edit]

Holtek Semiconductor[edit]

  • HT RISC:[56]:24–36 8-bit RISC MCU

Honeywell[edit]

These are instruction sets introduced by Honeywell; for the instruction sets from General Electric, refer to the General Electric section.

  • Datamatic 1000,[57] H-400, H-1400, H-800,[58] H-1800,[59] and H-1800-II:[60] 48-bit word machine with 3 address format

IBM[edit]

Infineon Technologies AG[edit]

INMOS and XMOS[edit]

by Prof. David May

Intel[edit]

  • 4004 (46 instructions)[86]:288/621
  • 4040 (60 instructions)[86]:218/621
  • 8008 (48 instructions)[86]:420/621
  • 8080 (111 Instructions),[87] 8085 (113 Instructions)[88]
  • 8021 (66 Instructions)[89]
  • 8022 (73 Instructions)[90]
  • MCS-41 (also known as 8041) (87 instructions)[91]
  • MCS-48 (also known as 8048) (93 instructions)[92]
  • MCS-51 (also known as 8051) (111 instructions)[93]:§3[94]:§2[95]
  • iAPX 432[96][97][98][99]
  • i860:[100][101] 32/64-bit VLIW RISC
  • i960 (also known as 80960) (FIX MI core instructions with 11 addressing modes):[102][103] 32-bit RISC
  • IA-64 (also known as Itanium):[104] Originated at Hewlett-Packard (HP), and later jointly developed by HP and Intel
  • x86, See: x86 instruction listings
    • 8086/8088, 80186/80188, 80286: 16-bit CISC
    • IA-32:[105][106] 32-bit CISC
    • x86-64: 64-bit extension of x86, originally developed by AMD as AMD64[6][7][8][9][10]
    • Extensions[107]
      • FPU (x87) – Floating-point-unit (FPU) instructions
      • MMX – MMX SIMD instructions
      • MMX Extended – extended MMX SIMD instructions
      • 3DNow! (21 instructions):[4] An extension for floating-point arithmetic (AMD)
      • 3DNow! Extensions (5 instructions):[5]:316 An extension for 3DNow! (AMD)
      • SSE – streaming SIMD extensions (SSE) instructions (70 instructions)
      • SSE2 – streaming SIMD extensions 2 instructions (144 new instructions)
      • SSE3 – streaming SIMD extensions 3 instructions (13 new instructions)
      • SSSE3 – supplemental streaming SIMD extensions (16 instructions)
      • SSE4.1 – streaming SIMD extensions 4, Penryn subset (47 instructions)
      • SSE4.2 – streaming SIMD extensions 4, Nehalem subset (7 instructions)
      • SSE4 – All streaming SIMD extensions 4 instructions (both SSE4.1 and SSE4.2)
      • SSE4a – streaming SIMD extensions 4a (AMD)
      • SSE5 – streaming SIMD extensions 5 (170 instructions, proposal from AMD)
      • F16C - FP16 conversion operations (from AMD), a revision of part of the proposed SSE5
      • XOP - eXtended Operations (AMD), a revision of part of the proposed SSE5
      • ABM - Advanced Bit Manipulation (from AMD)
      • TBM - Trailing Bit Manipulation (AMD)
      • XSAVE – XSAVE instructions
      • AVX – advanced vector extensions instructions
      • FMA – fused multiply-add instructions
      • AES – Advanced Encryption Standard instructions
      • CLMUL – Carry-less mtiply (PCLMULQDQ) instruction
      • Cyrix – Cyrix-specific instructions
      • AMD – AMD-specific instructions (older than K6)
      • SMM – System management mode instructions
      • SVM – Secure virtual machine instructions
      • PadLock – VIA PadLock instructions

IPFlex (later, Tokyo Keiki, Inc.)[edit]

Lattice Semiconductor[edit]

Lebedev Institute of Precision Mechanics and Computer Engineering[edit]

Maxim Integrated[edit]

MIPS Technologies[edit]

  • MIPS architecture
    • MIPS I
    • MIPS II
    • MIPS III
    • MIPS IV[111]
    • MIPS V
    • MIPS16
    • MIPS32
    • MIPS64
    • MDMX
  • Loongson Technology
    Loongson is a Chinese company. In its earlier stage, its architecture was MIPS like because of patents problem until a deal in 2007. In 2011, it formally licensed MIPS32 and MIPS64.
    • Loongson 1: 32-bit MIPS like. Lacking 4 instructions by patent issue.
    • Loongson 3: MIPS64 quad core. Over 200 instructions are added for x86 emulation.

MIT's Lisp machine (later, Symbolics, Inc., then Symbolics)[edit]

Mitsubishi Electric (later, Renesas)[edit]

MOS Technology (later, Commodore Semiconductor Group)[edit]

Motorola (later, Freescale and then NXP Semiconductor)[edit]

For the Power Architecture, refer to IBM section.

National Semiconductor[edit]

NCR Corporation[edit]

NEC Corporation[edit]

NEC's semiconductor operations (later, NEC Electronics, then Renesas Electronics)[edit]

  • μCOM-1600, also known as μPD768 (93 instructions): 16-bit single-chip CPU released in 1978. Used for NEC System 50 office computer.[137][138]
  • 17K Famiy ():[139]:§3:575/690–665/690 4-bit MCU
  • 75 Family
    • μPD7500: 4-bit MCU
      • μPD7500 set ? (106 instructions)
      • μPD7500 Set A (92 instructions)[140]:52–58
      • μPD7500 Set ? (67 instructions)
    • 75X Series ():[141]:§10[142]:§10 4-bit MCU
    • 75XL Series (): 4-bit MCU
  • μCOM-87 Family
    • μCOM-87 Series (): 8-bit MCU
    • μCOM-87LC Series (): 8-bit MCU
    • μCOM-87AD Series
      • NMOS version (158 instructions):[143]:§13 8-bit MCU
      • CMOS version (159 instructions):[144]:§14 8-bit MCU
  • 78K Family
    • 78K/0 Series: 8-bit MCU. Refer to Renesas section
    • 78K0R Series: 16/8-bit MCU. Refer Renesas RL78 section
    • 78K/0S Series: 8-bit MCU. Refer to Renesas section
    • 78K/1 Series(64 instructions):[145]:§18 8-bit MCU
    • 78K/2 Series(65 instructions):[146]:§18[147]:§20 8-bit MCU
    • 78K/3 Series(111 instructions with macro service):[148]:§18 16/8-bit MCU
    • 78K/4 Series(113 instructions with macro service):[149] 16/8-bit MCU
    • 78K/6 Series ( with macro service): 16-bit MCU
  • V60/V70, V80 (119, 123 instructions):[150] 32-bit CISC, little endian
  • V810/V830:[151] 32-bit RISC, little endian
  • V850: 32-bit RISC, Refer to Renesas section

OpenRISC Community[edit]

Parallax, Inc.[edit]

PEZY Computing[edit]

RCA[edit]

  • CDP1802[154]
  • Spectra 70 (System/360 compatible in user mode ("problem state"), not compatible in kernel mode ("supervisor state"))

Renesas[edit]

The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas Technology Corporation on April 1, 2003. In addition, NEC Electronics Corporation, a subsidiary of NEC Corporation, and Renesas Technology were merged into Renesas Electronics Corporation on April 1, 2010.

  • RL78 Family:[155] 8/16-bit CISC MCU, similar ISA to 8-bit 78K/0 legacy CISC, accumulator-based architecture, 2 operand instructions, 1–5 byte non-uniform length instructions, 13 addressing modes, non-orthogonal instruction set, little endian, 3-stage pipeline
    • RL78-S1 Core (74 instructions):[155] 8-bit ALU, 8× 8-bit registers, No register-banks
    • RL78-S2 Core (75 instructions):[155] 16-bit ALU, 8× 8-bit registers, 4× register-banks
    • RL78-S3 Core (81 instructions):[155] 16-bit ALU, multiplication/division/MAC extension
    • 78K0R (80 instructions divided into 15 groups):[156] 75 instructions out of 80 are identical to RL78.
      16-bit ALU, 8× 8-bit registers, 4× register-banks,
  • RX Family:[157]:14PDF8 32-bit CISC MCU, general-purpose-register-based architecture, 2 and 3 operand instructions, 1–8 byte non-uniform length instructions, 16× 32-bit GPRs, highly orthogonal instruction set, bi-endian, optional single precision floating-point arithmetic operations, 5-stage synchronous pipeline
    • RXv1 (90 instructions/10 addressing modes, basic:73, float:8, DSP:9)[158]
    • RXv2 (109 instructions/11 addressing modes, basic:75, float:11, DSP:23)[159]
  • RH850 Family: Upward compatible with V850 ISA, disclosed to automotive customers only
  • V850 Family: 32-bit RISC MCU, general-purpose-register-based architecture, load/store architecture, 2 operand instructions, basically 2-byte and 4-byte 2-way form instructions (having extension), relatively orthogonal instruction sets, branch with interlock, 32× 32-bit GPRs, little endian, optional single and double precision floating-point arithmetic operations, 5- or 7-stage synchronous pipeline
  • SuperH RISC engine Family:[53] 32/64-bit RISC MCU/MPU, general-purpose-register-based architecture, load/store architecture, 2-byte uniform length instruction set, relatively orthogonal instruction sets, branch with delay slots, 16× 32-bit GPRs with partially 2 banks of 8 registers, 1× 32-bit global base register, 2× 32-bit MAC register, 1× 32-bit procedure register, optional 2 banks of 16× 32-bit floating-point registers, optional 2× 40-bit and 6× 32-bit DSP registers, bi-endian, 5- or 7-stage synchronous pipeline
    • SH-1 (56 instructions):[167] 32-bit RISC
    • SH-2 (62 instructions):[167] 32-bit RISC
    • SH2-DSP (154 instructions):[167] 32-bit RISC
    • SH-2A (91 instructions):[168] 32-bit RISC
    • SH2A-FPU (112 instructions):[168] 32-bit RISC
    • SH-3 (68 instructions):[169] 32-bit RISC
    • SH-3E (84 instructions):[169] 32-bit RISC
    • SH3-DSP (160 instructions):[169] 32-bit RISC
    • SH-4 (93 instructions):[170] 32-bit RISC
    • SH4A (103 instructions):[171] 32-bit RISC
    • SH4AL-DSP (226 instructions):[172] 32 -bit RISC
    • For SH-5 Series, refer to Hitachi section
  • 78K Family:
    • 78K0 Series (48 instructions):[173] 8-bit MCU, accumulator-based architecture, 8× 8-bit registers, 4× register-banks, non-pipelined
    • 78K0S Series (47 instructions):[174] 8-bit simplified version of 78K0, no mul/div insn., no register-bank, etc.[175]
    • For 78K/1, 78K/2, 78K/3, 78K/4, and 78K/6 Series, refer to NEC's semiconductor section.
    • For 78K0R, refer to RL78 section.
  • R8C Family: 16-bit CISC MCU
    • R8C/Tiny Series (89 instructions)[176]
  • M16C Family (106 instructions):[177] 16-bit CISC
  • M32C Family (108 instructions):[178] 16/32-bit CISC MCU, 2 banks of 4 × 16-bit data and 2 × 24-bit address registers
  • M32R Family (83 instructions):[179] 32-bit RISC MCU
    • M32R-FPU (100 instructions):[180] floating-point arithmetic extension
  • H8SX Family ():[181] 32-bit MCU
  • H8S Family ():[182] 32-bit MCU
  • H8 Family
    • H8/300 Series ():[183] 16/8-bit MCU
    • H8/300H Series ():[184] 16/8-bit MCU
    • H8/300L Series ():[185] 16/8-bit MCU
    • For H8/500 Series, refer to Hitachi section
  • 720 Family (135 instruction):[186]:83–139 4-bit MCU, accumulator
  • 740 Family (71 instructions):[187] A 8-bit 6502 superset

Rockwell Collins[edit]

Samsung Electronics[edit]

  • SAM8

Scenix Semiconductor (later, Ubicom then Qualcomm)[edit]

Ubicom was acquired by Qualcomm in 2012.

Signetics[edit]

SpaceWire UK[edit]

  • Raptor-16:[189] 16-bit CISC

STMicroelectronics (formerly, SGS-Thomson)[edit]

For SPC5 Power Architecture Book E product line, refer to IBM section.

  • STM8 (80 instructions, 20 addressing modes):[190] 8-bit MCU
  • ST10 ("FIX-ME" basic instructions and "FIX-ME" MAC instructions):[191] 16-bit MCU
  • ST40 ():[192][193] 32-bit RISC SuperH family SH-4 architecture, jointly developed with Hitachi

Sun Microsystems (later, Oracle)[edit]

Tensilica (later, Cadence)[edit]

Texas Instruments[edit]

UNIVAC (later, Unisys)[edit]

University of California, Berkeley (UCB) (later, RISC-V Foundation)[edit]

University of Cambridge[edit]

University of Texas at Austin, and University of Illinois at Urbana–Champaign[edit]

University of Tokyo[edit]

  • TAC:[210] A tube computer developed in 1959

U.S. Military[edit]

Xerox[edit]

Xilinx[edit]

Zilog (later, a subsidiary of IXYS Corporation)[edit]

See also[edit]

References[edit]

  1. ↑ ARK Core (in Korean)
  2. ↑ Nios II Instruction Set Reference
  3. ↑ "Evaluating and Programming the 29K RISC Family" (PDF). AMD. Archived from the original (PDF) on 2007-09-27.
  4. ↑ 4.0 4.1 3DNow! Technology Manual
  5. ↑ 5.0 5.1 5.2 Software Optimization Guide for AMD64 Processors
  6. ↑ 6.0 6.1 AMD64 Architecture Programmer’s Manual Volume 1: Application Programming
  7. ↑ 7.0 7.1 AMD64 Architecture Programmer’s Manual Volume 2: System Programming
  8. ↑ 8.0 8.1 AMD64 Architecture Programmer’s Manual Volume 3: General-Purpose and System Instructions
  9. ↑ 9.0 9.1 AMD64 Architecture Programmer’s Manual Volume 4: 128-Bit and 256-Bit Media Instructions
  10. ↑ 10.0 10.1 AMD64 Architecture Programmer’s Manual Volume 5: 64-Bit Media and x87 Floating-Point Instructions
  11. ↑ ADSP-2106x SHARC Processor User’s Manual
  12. ↑ ADSP-BF7xx Blackfin+ Processor Programming Reference
  13. ↑ ARC Programmers Reference Manual, ARC International
  14. ↑ ARM Software Development Toolkit Reference Manual, Advanced RISC Machines Ltd
  15. ↑ ARM Thumb
  16. ↑ ARM DSP
  17. ↑ ARM Thumb-2
  18. ↑ "ARM TrustZone - Open Virtualization FAQ".
  19. ↑ ARM SIMD
  20. ↑ "Technologies | NEON - Arm Developer".
  21. ↑ WE DSP16A Digital Signal Processor, 1998
  22. ↑ ATT2100 Microprocessor Hardware Specification, March 91
  23. ↑ "Microelectronic Products Selection Guide" (PDF). AT&T. Spring 1988.
  24. ↑ "AVR Instruction Set Manual" (PDF). Atmel.
  25. ↑ "AVR32 Architecture Document" (PDF). Atmel.
  26. ↑ Data General Nova - Instruction Set Summary, users.rcn.com
  27. ↑ Data General ECLIPSE - Instruction Set Summary, users.rcn.com
  28. ↑ ECLIPSE/MV Family 32-Bit Systems, Principles Of Operation
  29. ↑ pdp11 processor handbook, 1979
  30. ↑ VAX Architecture Reference Manual
  31. ↑ The MMIX Instruction Set
  32. ↑ Walter Hollingsworth; Howard Sachs; Alan Jay Smith (February 1989). "The Clipper processor: instruction set architecture and implementation" (PDF). Communications of the ACM. 32 (2): 200–219.
  33. ↑ Fujitsu official: FR Family 32-BIT MICROCONTROLLER INSTRUCTION MANUAL
  34. ↑ Fujitsu official: FR81 Family 32-BIT MICROCONTROLLER PROGRAMMING MANUAL
  35. ↑ Fujitsu official: F2MC-16FX 16-BIT MICROCONTROLLER PROGRAMMING MANUAL
  36. ↑ Cypress official: F2MC-8FX Programming Guide
  37. ↑ GE-225 Programming Reference Manual (PDF). General Electric. October 1963. Search this book on
  38. ↑ GE-425/435 Reference Manual (PDF). General Electric. December 1963. Search this book on
  39. ↑ GE-412 Programming manual
  40. ↑ GE-625/635 Programming Reference Manual (PDF). General Electric. April 1968. Search this book on
  41. ↑ GE-645 System Manual (PDF). General Electric. January 1968. Search this book on
  42. ↑ 42.0 42.1 DPS/LEVEL 68 & DPS 8M MULTICS PROCESSOR MANUAL
  43. ↑ "Assembly Instructions, DPS 8000" (PDF). Bull.
  44. ↑ 44.0 44.1 44.2 ACOS Series 77
  45. ↑ Honeywell DPS90
  46. ↑ SPO256 - Speech processor
  47. ↑ Section 29. Instruction Set
  48. ↑ 48.0 48.1 48.2 Instruction set: PIC
  49. ↑ dsPIC30F Programmer’s Reference Manual
  50. ↑ Sailer, Philip M.; Kaeli, David R.. The DLX Instruction Set Architecture Handbook. Morgan Kaufmann. ISBN 1-55860-371-9 Search this book on ..
  51. ↑ Instruction set reference for 6809/6309 (PDF) By Chris Lomont
  52. ↑ H8/500 Series Programming Manual (Hitachi M21T001)
  53. ↑ 53.0 53.1 "SuperH RISC engine Family". Archived from the original on 2012-05-26. Retrieved 2012-06-19.
  54. ↑ The SH-5 Architecture White Paper by komputilo.org
  55. ↑ 64-Bit RISC Series SH-5 System Architecture, Volume 1: System (SuperH, Inc.) by yumpu.com
  56. ↑ Hotek official: HT46R53A/HT46R54A A/D Type 8-Bit OTP MCU
  57. ↑ Datamatic 1000
  58. ↑ Honeywell 800: Programmers' reference manual
  59. ↑ Honeywell 1800 Programmer's Reference Manual (PDF), Second Printing, Honeywell, June 1964 Search this book on
  60. ↑ George B. Bailey; C. Norman Canning; William S. Grinker; Rolf Kates; William L. Mellentin; Norman Nisenoff, "HONEYWELL 1800-II A Large -Scale Scientific Processor" (PDF)
  61. ↑ Honeywell Series 200: Programmers's reference manual
  62. ↑ Model 8200 Hardware Reference Manual (PDF), Preliminary, Honeywell, August 1, 1967, 113.0011.0000.0-685 Search this book on
  63. ↑ Honeywell Series 16 - Model 316 and 516: Programmers' reference manual
  64. ↑ IBM System/3 Basic Assembler Reference Manual (PDF). IBM. April 1975. SC21-7509-7. Search this book on
  65. ↑ IBM System/32 Functions Reference Manual (PDF). IBM. May 1975. GA21-9176-1. Search this book on
  66. ↑ IBM System/34 Functions Reference (PDF). IBM. December 1977. SA21-9243-0. Search this book on
  67. ↑ IBM System/36 Programming With Assembler (PDF). IBM. January 1986. SC21-7908-3. Search this book on
  68. ↑ "IBM System/38 Functional Reference Manual" (PDF). IBM. February 1981. GA21-9331-1.
  69. ↑ "IBM i Machine Interface". IBM.
  70. ↑ IBM official:PowerPC User Instruction Set Architecture, Book I, Version 2.01
  71. ↑ IBM official:"PowerPC Architecture Book, Version 2.02"
  72. ↑ NXP official: "Book E: Enhanced PowerPC Architecture"
  73. ↑ STMicrolectronics official: Programmer’s reference manual for Book E processors
  74. ↑ "Cell Broadband Engine Programming Handbook Including the PowerXCell 8i Processor Version 1.11"
  75. ↑ Power ISA Version 2.03
  76. ↑ Power ISA Version 2.06 Revision B
  77. ↑ 77.0 77.1 Open POWER official: "IBM Power ISA Specification"
  78. ↑ "Power ISA v2.07B (for POWER8 & POWER8 with NVIDIA NVlink)"
  79. ↑ "Power ISA v3.0B (for POWER9)"
  80. ↑ "Infineon C166 and Instruction Set Manual", Infineon
  81. ↑ "Infineon C500 Architecture and Instruction Set", Infineon
  82. ↑ TriCore User Manual (Volume 1)
  83. ↑ TriCore User Manual (Volume 2)
  84. ↑ INMOS Transputer
  85. ↑ "XMOS XS1 Instruction Set Architecture"
  86. ↑ 86.0 86.1 86.2 "Intel Data Catalog (1976)"
  87. ↑ 8080a
  88. ↑ 8085a
  89. ↑ 8021
  90. ↑ 8022
  91. ↑ 8041
  92. ↑ 8048
  93. ↑ "Intel MCS-51 User's Manual (January 1981)"
  94. ↑ "Intel MCS-51 User's Manual (February 1994)"
  95. ↑ "ARM/KEIL 8051 web site"
  96. ↑ Intel 432 System Summary: Manager's Perspective
  97. ↑ Introduction to the iAPX 432 Architecture
  98. ↑ iAPX 432 General Data Processor Architecture Reference Manual
  99. ↑ iAPX 432 Interface Processor Architecture Reference Manual
  100. ↑ i860 Microprocessor Programmer's Reference Manual or i860 Microprocessor Architecture
  101. ↑ i860 Microprocessor Datasheet
  102. ↑ 80960KB Programmer's Reference Manual (March 1988)
  103. ↑ i960CA/CF User's GUide (March 1994)
  104. ↑ IA-64 Architecture Handbook
  105. ↑ 80386 Programmer's Reference Manual (1986)
  106. ↑ i486 Microprocessor Programmers Reference Manual (1990)
  107. ↑ Yasm User Manual – Execution Modes and extensions, Chapter 18. x86 Architecture
  108. ↑ LatticeMico8 Architecture Manual (Registration required)
  109. ↑ LatticeMico32 SW Developer User Guide (Registration reuired)
  110. ↑ MAXQ Family User' Guide
  111. ↑ MIPS IV Instruction set
  112. ↑ D10V Architecture: A VLIW Microprocessor for Multimedia Applications (Mitsubishi Electric Corp.)
  113. ↑ D30V Architecture: A VLIW Microprocessor for Multimedia Applications (Mitsubishi Electric Corp.
  114. ↑ Renesas official: 7900 Series SOFTWARE MANUAL
  115. ↑ 6502 MICROPROCESSOR Instruction Set Summary
  116. ↑ 6800 MICROPROCESSOR Instruction Set Summary (April 1985)
  117. ↑ 6801/68701 Single-Chip MICROCOMPUTER Instruction Set Summary (April 1985)
  118. ↑ 6805 MICROPROCESSOR Instruction Set Summary (April 1985)
  119. ↑ 6809 MICROPROCESSOR Instruction Set Summary (April 1985)
  120. ↑ [1]
  121. ↑ http://www.textfiles.com/programming/CARDS/68000
  122. ↑ http://www.textfiles.com/programming/CARDS/68010
  123. ↑ DSP56800 Family Manual
  124. ↑ SC3850 DSP Core
  125. ↑ SC140 DSP Core Reference Manual
  126. ↑ StarCore SC3900FP - Flexible vector processor
  127. ↑ NSC800 MICROPROCESSOR Instruction Set Summary (April 1985)
  128. ↑ NS16032 MICROPROCESSOR Instruction Set Summary (July 1985)
  129. ↑ NS32016 MICROPROCESSOR Instruction Set Summary (July 1985)
  130. ↑ NS32032 MICROPROCESSOR Instruction Set Summary (July 1985)
  131. ↑ Hardware Technology of the SX-9 (1) - Main System -
  132. ↑ Hardware Technology of the SX-9 (2) - Internode Switch -
  133. ↑ LSI and Circuit Technologies of the SX-9
  134. ↑ The Compilers and MPI Library for SX-9
  135. ↑ SX-ACE
  136. ↑ ACOS System 1500 Series: ACOS-4 OS
  137. ↑ uCOM-1600 (Google Translate)
  138. ↑ NEC System 20/25, 50/35, 100/45, 150/55
  139. ↑ 17K 4-bit microcontroller data book (1992)
  140. ↑ Renesas official: UPD7503A Data Sheet
  141. ↑ Renesas official: UPD75336 User's Manual
  142. ↑ Renesas official: UPD75518 User's Manual
  143. ↑ μCOM-87AD User's Manual
  144. ↑ Renesas official: 87AD Series UPD78C18 User's Manual
  145. ↑ Renesas official: UPD78148 User's Manual
  146. ↑ Renesas official: UPD78244 Sub-Series Hardware
  147. ↑ Renesas official: UPD78234 Sub-Series for Hardware
  148. ↑ Renesas official: UPD78334 User's Manual
  149. ↑ Renesas official: 78K/IV Series Instructions
  150. ↑ PD70616 Programmer's Reference Manual (Nov 1986)
  151. ↑ V810 FAMILY 32-BIT MICROPROCESSOR ARCHITECTURE (Oct 1995, 1st Ed.)
  152. ↑ OpenRISC 1000 Architecture
  153. ↑ Propeller P8X32A Datasheet
  154. ↑ CDP1802 COSMAC Microprocessor Instruction Set Summary (April 1985)
  155. ↑ 155.0 155.1 155.2 155.3 Renesas official: RL78 Family User's Manual: Software
  156. ↑ Renesas official: 78K0R Microcontrollers User's Manual: Instructions
  157. ↑ Renesas official: RX Family Renesas 32-Bit Microcontrollers
  158. ↑ Renesas official: RX Family User's Manual: Software
  159. ↑ Renesas official: RX Family RXv2 Instruction Set Architecture User's Manual: Software
  160. ↑ Renesas official: V850 Family for Architecture
  161. ↑ Renesas official: V850E/MS1,V850E/MS2 32-Bit Single-Chip Microcontrollerfor Architecture
  162. ↑ Renesas official: V850E1 for Architecture
  163. ↑ Renesas official: V850ES for Architecture
  164. ↑ Renesas official: V850E2 for Architecture
  165. ↑ Renesas official: V850E2S User's Manual: Architecture
  166. ↑ Renesas official: V850E2M User's Manual: Architecture
  167. ↑ 167.0 167.1 167.2 Renesas official: SH-1/SH-2/SH-DSP Software Manual
  168. ↑ 168.0 168.1 Renesas official: SH-2A SH2A-FPU Software Manual
  169. ↑ 169.0 169.1 169.2 Renesas official: SH-3/SH-3E/SH3-DSP Software Manual
  170. ↑ Renesas official: SH-4 Software Manual
  171. ↑ Renesas official: SH-4A Software Manual
  172. ↑ Renesas official: SH4AL-DSP Software Manual
  173. ↑ Renesas official: 78K/0 Series for Instructions
  174. ↑ Renesas official: 78K/0S Series for Instructions
  175. ↑ Renesas official: Difference on 78K0 and 78K0S in 8-bit All Flash microcontrollers.
  176. ↑ Renesas official: R8C/Tiny Series Software Manual
  177. ↑ Renesas official: M16C/60 M16C/20 M16C/Tiny Series Software Manual
  178. ↑ Renesas official: M32C/80 Series Software Manual
  179. ↑ Renesas official: M32R Family Software Manual
  180. ↑ Renesas official: M32R-FPU Software Manual
  181. ↑ Renesas official: H8SX Family Software Manual
  182. ↑ Renesas official: H8S/2600 Series H8S/2000 Series Software Manual
  183. ↑ Renesas official: H8/300 Programmig Manual
  184. ↑ Renesas official: H8/300H Series Software Manual
  185. ↑ Renesas official: H8/300L Series Software Manual
  186. ↑ Renesas official: 720 Family 4509 Group Datasheet
  187. ↑ Renesas official: 740 Family Software Manual
  188. ↑ 2650 MICROPROCESSOR Instruction Set Summary
  189. ↑ Raptor-16 Instruction Set
  190. ↑ STMictoelectronics official: STM8 CPU programming manual
  191. ↑ STMicroelectronics official: ST10 FAMILY PROGRAMMING MANUAL
  192. ↑ STMicroelectronics official: SH-4 CPU Core Architecture
  193. ↑ STMicroelectronics official: SH-4, ST40 system architecture, volume 1: system
  194. ↑ The Sparc Architecture Manual, Version 8 (SPARC International, Inc.)
  195. ↑ Oracle SPARC Processor Documentation
  196. ↑ 196.0 196.1 196.2 196.3 Oracle SPARC Architecture 2011
  197. ↑ The Java Virtual Machine Instruction Set
  198. ↑ picoJava-II Programmer's Reference Manua
  199. ↑ §3 JEM1 Microarchitecture Overview
  200. ↑ aJ-200 Technical Reference Manual
  201. ↑ "Java Card Downloads". www.oracle.com.
  202. ↑ Xtensa Instruction Set Architecture (ISA) Reference Manual
  203. ↑ 203.0 203.1 Cadence Tensilica ConnX
  204. ↑ 9900 MICROPROCESSOR Instruction Set Summary
  205. ↑ 9940 MICROPROCESSOR Instruction Set Summary
  206. ↑ 9980 MICROPROCESSOR Instruction Set Summary
  207. ↑ MSP430 User's Manual, document slau049d, Texas Instrument, Inc
  208. ↑ RISC-V Foundation
  209. ↑ The Microarchitecture of the LC-3b
  210. ↑ TAC - Computer Museum
  211. ↑ SIXTEEN-BIT COMPUTER INSTRUCTION SET ARCHITECTURE
  212. ↑ MicroBlaze Processor Reference Guide (UG081)
  213. ↑ PicoBlaze 8-bit Embedded Microcontroller User Guide (UB129), Chapter 3, PicoBlaze Instruction Set
  214. ↑ Z80 MICROPROCESSOR Instruction Set Summary (April 1985)
  215. ↑ Z8601/02/03/11/12/13 Single-Chip MICROCOMPUTER Instruction Set Summary (April 1985)
  216. ↑ Z8001/Z8002 MICROPROCESSOR Instruction Set Summary

Further reading[edit]

External links[edit]


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