OpenASIP
| Original author(s) | Customized Parallel Computing group of Tampere University |
|---|---|
| Developer(s) | various contributors |
| Stable release | 1.21
/ March 27th, 2020 |
| Written in | C++, C, Python |
| Engine | |
| Operating system | Linux, FreeBSD, OS X |
| Type | Electronic Design Automation |
| License | MIT License |
| Website | [1] |
Search OpenASIP on Amazon.
OpenASIP is an open-source hardware project first published in March 2009. It is an open source tool for application-specific instruction-set processor design and programming. It is also known as TTA-based Co-design Environment (TCE) due to its use of TTA as the processor template in the tool flow. While the template is based on TTA, over time the toolset has added more support for non-TTAs (also known as Operation Triggered Architectures in this context.[1]) that can be often mapped as subsets within the TTA template, therefore its name has been changed to a more general one over the recent releases.
OpenASIP was started in a processor customization research project in 2002 in Tampere University (then known as Tampere University of Technology) with the goal to study application-specific processors for digital signal processing workloads, with a focus on the energy-efficiency and scaling benefits of the TTA approach. The development of one of the research project's results, a complete retargetable ASIP toolset, is still led by Customized Parallel Computing research group of Tampere University. The toolset project was originally started as a rewrite of a previous TTA-based ASIP toolset called MOVE[2].
The toolset provides a complete retargetable co-design flow from high-level language programs (C, OpenCL) down to synthesizable processor RTL and parallel program binaries[3]. Processor customization points include the register files, (independently pipelined) function units, supported operations, and the interconnection network. Its retargetable compiler is based on the LLVM project[4]
References[edit]
- ↑ Hoogerbrugge, Jan; Corporaal, Henk (1994). Transport-triggering vs. operation-triggering (PDF). International Conference on Compiler Construction. doi:10.1007/3-540-57877-3_29.
- ↑ Corporaal, Henk; Hoogerbrugge, Jan (1996). Cosynthesis with the MOVE framework. Symposium on Modelling, Analysis, and Simulation. CiteSeerX 10.1.1.74.8844.
- ↑ Jääskeläinen, Pekka; Viitanen, Timo; Takala, Jarmo; Berg, Heikki (2017). "HW/SW Co-design Toolset for Customization of Exposed Datapath Processors. Springer International Publishing. doi:10.1007/978-3-319-49679-5_8. ISBN 978-3-319-49679-5. Search this book on
- ↑ "The LLVM Project Blog: TCE project: Co-design of application-specific processors with LLVM-based compilation support".
External links[edit]
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I added more references and removed the ext. link in the body. Please note that I'm an original author of the described software, thus a first-hand source of information for some of the sentences.[edit]
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