OpenASIP
| Original author(s) | Customized Parallel Computing group of Tampere University |
|---|---|
| Developer(s) | various contributors |
| Stable release | 1.21
/ March 27th, 2020 |
| Written in | C++, C, Python |
| Engine | |
| Operating system | Linux, FreeBSD, OS X |
| Type | Electronic Design Automation |
| License | MIT License |
| Website | [1] |
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OpenASIP is an open-source hardware project first published in March 2009. It is an open source tool for application-specific instruction-set processor design and programming. It is also known as TTA-based Co-design Environment (TCE) due to its use of TTA as the processor template in the tool flow.
OpenASIP was started in a processor research project in 2002 in Tampere University (then known as Tampere University of Technology) with the goal to study application-specific processors for digital signal processing workloads, with a focus on the energy-efficiency and scaling benefits of the TTA approach. The development of one of the research project's results, a complete ASIP toolset, is still led by Customized Parallel Computing group of Tampere University.
The toolset provides a complete retargetable co-design flow from high-level language programs (C, OpenCL) down to synthesizable processor RTL and parallel program binaries.[1] Processor customization points include the register files, (independently pipelined) function units, supported operations, and the interconnection network. Its retargetable compiler is based on the LLVM project.
References
- ↑ Jääskeläinen, Pekka; Viitanen, Timo; Takala, Jarmo; Berg, Heikki (2017). "HW/SW Co-design Toolset for Customization of Exposed Datapath Processors. Springer International Publishing. doi:10.1007/978-3-319-49679-5_8. ISBN 978-3-319-49679-5. Search this book on
External links
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